Advanced Nanolithography and 2D Transistors Continue to Support Moore’s Law

  • Nanofabrication core
  • 2022-12-09

On December 16, 1947 there was only one transistor in the world. Two years later John Bardeen’s “music box” (see article “Fun Facts Bardeen’s Music Box” below) utilized two point-contact transistors. By the early 70’s microprocessors had a few thousand transistors. Today Apple’s M1 chip has 16 billion transistors! If we plot the number of transistors in an integrated circuit (IC) over time, we observe that the number of transistors doubles about every two years. The observation of the doubling in the number of transistors every two years is called Moore's law. Thus, continuing along Moore’s law, the number of transistors in logic circuits has increased more than 600,000 times since 1971. According to TechInsights forecast, the semiconductor industry is on track to produce almost 2 billion trillion devices this year!

Our ability to increase the number of transistors on an IC depends upon on our ability to reduce the device’s feature size using a patterning process known as lithography. Lithography is a method of patterning a material on a flat surface. The word lithography comes from the Greek lithos, meaning stones, and graphia, meaning to write. Therefore it literally means “writing on stones”. In the case of semiconductor lithography, our stones are silicon wafers, and our patterns are written onto a light sensitive polymer called a photoresist. Thus, “photolithography” for current semiconductor device fabrication involves the use of optical exposure to create the desired pattern on a wafer. Using photolithography to define smaller and smaller feature sizes requires shorter and shorter wavelengths of light, such as i-line (365 nm), deep ultraviolet (193 nm to 248 nm), and extreme ultraviolet (13.5 nm). Current extreme ultraviolet (EUVL) photolithography tools can resolve feature sizes down to less than 10 nm. These EUVL tools cost hundreds of millions of dollars and have an extremely high cost of ownership. The NanoFab is able to define similar feature sizes as EUVL tools, but using a different technique called Electron Beam Lithography (EBL). EBL tools use electrons to expose the resist instead of light (see additional information on the NanoFab’s Elionix ELS-BODEN EBL here and here). When using an EBL tool you might think of electrons as being light, but with a much shorter wavelength. EBL tools are much less expensive than an EUVL tool, but unfortunately, they cannot match the wafer throughput of the EUVL. Thus, forgoing the need for high wafer throughput, an EBL is the ideal lithography tool for R&D labs. In addition, EBL tools are direct-write (similar to the NanoFab’s optical MLA-150 laser scan lithography tool), meaning they do not require expensive reticles. Instead, the patterns are imaged on the resist using a raster-scanned beam of electrons – very similar to a cathode ray tube (CRT) television. However, in order to define features even smaller than those in 3 to 5 nm FINFET devices we may need to stack the transistors. Thus, tomorrow’s transistors may rely on 2D semiconductors, such as molybdenum disulfide and tungsten disulfide (see article below “Improvements in 2D p-type WSe2 transistors towards ultimate CMOS scaling” by Dr. Ivan Sanchez Esqueda and Md Naim Patoary).

Authors: Kevin Hilgers and Kevin Nordquist